| 摘要 |
Provided is a semiconductor storage device capable of easily setting memory cells at a proper potential in a standby mode, along with a reduction in an area of circuitry for controlling a potential of source lines of the memory cells. The semiconductor storage device includes a memory array and a control circuit for controlling the memory array. The memory cells are static-type memory cells. The control circuit includes: a first switching transistor provided between a source line coupled to a source electrode of driving transistors and a first voltage; a second switching transistor provided in parallel with the first switching transistor; and a source line potential control circuit which sets the first and second switching transistors conductive to couple the source line to the first voltage when the memory cells are operating, and sets the first switching transistor non-conductive and sets a gate electrode of the second switching transistor coupled to the source line when the memory cells are on standby. |
