APPARATUSES AND METHODS TO PERFORM POST PACKAGE TRIM

摘要

Memory die can be stacked to form a three-dimensional integrated circuit. For example, through-silicon vias (TSVs) can permit signals to pass vertically through the three-dimensional integrated circuit. Disclosed herein are apparatuses and methods to perform post package trimming of memory die, which advantageously permits the memory die to be trimmed after the memory die is stacked, such that test and trimming characteristics are relatively close to that which will be actually be encountered.

主权项

1. An apparatus comprising:
an integrated circuit die comprising:
an array of memory cells;an interface configured to permit data transfer to and from the integrated circuit die;a circuit configured to enter a post-package trim mode in response to instructions received over the interface, wherein the circuit is configured to receive one or more values and to adjust a characteristic of the integrated circuit relating to a memory characteristic based at least partly on the one or more values.