INTEGRATED CIRCUIT STRUCTURES WITH SPIN TORQUE TRANSFER MAGNETIC RANDOM ACCESS MEMORY HAVING INCREASED MEMORY CELL DENSITY AND METHODS FOR FABRICATING THE SAME

摘要

STT-MRAM integrated circuit and method for fabricating the same are disclosed. An integrated circuit includes a word line layer, a bit line layer, and an MRAM stack in contact with the bit line metal layer. The integrated circuit further includes a first doped silicon layer in contact with the MRAM stack, the first doped silicon layer including conductivity-determining ions of a first type, and a second doped silicon layer in contact with the first doped silicon layer and further in contact with the word line layer, the second doped silicon layer including conductivity-determining ions of a second type that is opposite the first type. Still further, the integrated circuit includes a third doped silicon layer in contact with the second doped silicon layer and a source line layer in electrical contact with the third doped silicon layer.

主权项

1. An integrated circuit comprising:
a word line layer; a bit line layer; a magnetic random access memory (MRAM) stack in contact with the bit line metal layer; a first doped silicon layer in contact with the MRAM stack, the first doped silicon layer comprising conductivity-determining ions of a first type; a second doped silicon layer in contact with the first doped silicon layer and further in contact with the word line layer, the second doped silicon layer comprising conductivity-determining ions of a second type that is opposite the first type; a third doped silicon layer in contact with the second doped silicon layer; and a source line layer in electrical contact with the third doped silicon layer.