发明名称 電子制御装置
摘要 PROBLEM TO BE SOLVED: To provide an electronic control unit having multiple CPUs with a minimal increase in memory capacity.SOLUTION: CPUs 10, 20 have arithmetic units 11, 21 and built-in memories 13, 23, respectively. Each built-in memory 13, 23 stores an OS program PG copied from a flash ROM 30. Each CPU 10, 20, when accessing an application programming interface (hereunder called API) written inside the OS program PG, determines a logical address for accessing the API on the basis of an offset address for accessing the API inside the OS program PG in reference to a beginning address preset as a reference address within the OS program PG, and a base address representing a logical address corresponding to the beginning address of the OS program PG in the built-in memory 13, 23, and then makes the arithmetic unit 11, 21 access the determined logical address.
申请公布号 JP5915624(B2) 申请公布日期 2016.05.11
申请号 JP20130235881 申请日期 2013.11.14
申请人 株式会社デンソー 发明人 松井 幸一
分类号 G06F9/50;G06F9/445;G06F12/02;G06F12/08 主分类号 G06F9/50
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