发明名称 Memory device for reducing a write fail, a system including the same, and a method thereof
摘要 A memory system includes a memory device and a memory controller. The memory device includes a plurality of memory cells. The memory controller is configured to continuously perform a plurality of write commands on the memory device between an active command and a precharge command. In the memory system, when after a first write operation having a last write command of the plurality of write commands is performed and then the precharge command is issued, the last write command is issued for a second write operation after the precharge command. The first write operation and the second write operation write a same data to memory cells of plurality of memory cells having a same address.
申请公布号 US9335951(B2) 申请公布日期 2016.05.10
申请号 US201314013275 申请日期 2013.08.29
申请人 SAMSUNG ELECTRONICS CO., LTD. 发明人 Son Jong Pil;Park Chul Woo;Yu Hak Soo;Hwang Hong Sun
分类号 G06F3/00;G06F3/06;G11C7/00;G11C11/4076;G06F13/16 主分类号 G06F3/00
代理机构 F. Chau & Associates, LLC 代理人 F. Chau & Associates, LLC
主权项 1. A memory system comprising: a memory device comprising a plurality of memory cells; and a memory controller configured to issue a plurality of write commands on the memory device, wherein the memory device performs a first write operation corresponding to a last write command of the plurality of write commands to write a data set to first memory cells, performs a precharge operation, and then, performs a second write operation corresponding to the last write command to rewrite the data set to the first memory cells, and wherein the first write operation and the second write operation are writing the same data set to the first memory cells of the plurality of memory cells having a same address, wherein the memory controller is configured to further issue at least one read command or at least one write command after the precharge command and before the second write operation, wherein the memory device sends an alarm signal to the memory controller and the memory controller, in response to the alarm signal, applies the last write command to the memory device after the precharge command.
地址 Suwon-si, Gyeonggi-do KR