发明名称 Error detection for multi-bit memory
摘要 Systems, methods, and devices are disclosed, including a device that includes a plurality of data locations, a quantizing circuit coupled to the plurality of data locations, and an error detection module coupled to the quantizing circuit. In some embodiments, the error detection module includes an encoder configured to encode incoming data with redundant data derived from the incoming data and a decoder configured to detect errors in stored data based on the redundant data.
申请公布号 US9336084(B2) 申请公布日期 2016.05.10
申请号 US201213371133 申请日期 2012.02.10
申请人 Micron Technology, Inc. 发明人 Baker R. Jacob
分类号 H03M13/00;G06F11/10;G11C29/04 主分类号 H03M13/00
代理机构 Fletcher Yoder, P.C. 代理人 Fletcher Yoder, P.C.
主权项 1. A system comprising: a memory device comprising: a plurality of data locations;a quantizing circuit having an analog-to-digital converter coupled to the plurality of data locations and a digital filter coupled to the analog-to-digital converter, wherein the digital filter comprises a counter configured to monitor a bit-stream from the analog-to digital converter to generate a count that corresponds with a value stored by a data location of the plurality of data locations; andan encoder configured to receive data to be stored in at least one of the plurality of data locations, generate redundant data based on the data, and associate the redundant data with the data such that the data and the redundant data are stored in the at least one of the plurality of data locations.
地址 Boise ID US