Input-controllable dynamic cross-connect

摘要

A multiplexer capable of automatically and dynamically selecting a correct or the best input out of a pre-configurable set of alternative inputs, based on the current status of the alternative inputs. An input status-sensitive, dynamic, M-by-M digital cross-connect can be formed out of an arrangement of M (an integer) instances of such input-controllable dynamic M:1 multiplexers. An application is an SDH/SONET cross-connect system that is able to perform a protection-switch for any number, up to all, of its output paths, simultaneously, if necessary, thereby enabling a short and deterministic latency for individual-path-granular protection-switch process for cross-connects of unlimited capacity. Another application is an SDH/SONET path that can be dynamically shared, even at a single time-slot granularity, among multiple path sources. Such a multi-source-bus configuration of an SDH/SONET path enables allocating network resources dynamically based on the real-time capacity demand patterns, thereby maximizing the network throughput for bursty data traffic.

主权项

1. A method for dynamically multiplexing data onto a data output, the method comprising, for each given one of a series of multiplexing timeslots:
receiving a set of input signals on a set of data inputs; forming a selector to identify one of the data inputs based at least in part on a comparison between a status of alternative inputs and a predefined input selection criteria; connecting to the data output the data input that is identified for a given timeslot by the selector; choosing the selector from two or more alternative selectors, said alternative selectors identifying their respective alternative inputs from the set of data inputs, so that such one of the alternative selectors, whose associated alternative input's status matches or best matches the predefined selection criteria, will be chosen as the selector for the given timeslot, and wherein the predefined selection criteria is identical for each of the alternative inputs; and performing the method by hardware logic, in which each of the timeslots is a single hardware logic clock cycle for the hardware logic performing the method, wherein the method involves a control process by which for any single timeslot, at most one indicator expresses that its associated data input is to be selected.