Method for removing hard mask oxide and making gate structure of semiconductor devices

摘要

A method includes forming a first gate above a semiconductor substrate, forming a hard mask on the first gate, and forming a contact etch stop layer (CESL) on the hard mask. No hard mask is removed between the step of forming the hard mask and the step of forming the CESL. The method further includes forming an interlayer dielectric (ILD) layer over the CESL, and performing one or more CMP processes to planarize the ILD layer, remove the CESL on the hard mask, and remove at least one portion of the hard mask.

主权项

1. A method, comprising:
forming a first gate above a semiconductor substrate; forming a hard mask having a first composition on the first gate; forming a contact etch stop layer (CESL) having a second composition, the second composition being different than the first composition, the CESL formed directly on the hard mask without removal of the hard mask between forming the hard mask and forming the CESL; forming an interlayer dielectric (ILD) layer, the ILD layer being formed over the CESL; and performing two CMP processes, the two CMP processes including
a first CMP process with a first slurry to remove the ILD layer above a top surface of the CESL, wherein the first CMP process stops when the top surface of the CESL is exposed, and wherein the top surface of the CESL absorbs the first slurry to increase its selectivity to the first CMP process, anda second CMP process with a second slurry to selectively remove the CESL and remove the hard mask, wherein the second CMP process stops when a top surface of polysilicon of the first gate is exposed, and wherein the second slurry comprises silica particles and provides a removal rate of the hard mask having the first composition to the polysilicon of the first gate of approximately 20:1 to approximately 40:1.