System and method for polling the status of memory devices

摘要

A memory controller and methods thereof suitable for operating a system utilizing multiple memory bus channels and/or multiple banks of memory devices on each channel wherein the memory devices is polled only when necessary. The memory controller includes means for determining a status of each individual memory device of the plurality of memory devices, a channel controller for each memory bus channel, and at least one status register on which is stored a plurality of bits. The channel controller maintains a derived status of each individual memory device based on the current and previous status data. Each individual bit of the plurality of bits of the status register corresponds to an individual memory device of the plurality of memory devices and indicates the derived status of the individual memory device which are used to determine whether to check for a queued command destined for the individual memory device.

主权项

1. A memory controller for a mass storage device comprising a plurality of memory bus channels each connected to a plurality of nonvolatile memory devices, the memory controller comprising:
means for determining a status of each individual memory device of the plurality of memory devices, the determining means providing status data indicating if each individual memory device can accept a data command (ready) or not (busy); a channel controller for each of the plurality of memory bus channels, the channel controller polling each individual memory device for the status data at intervals using the determining means and determining a derived status of each individual memory device, wherein the derived status is a combination of a first status data polled at a first sampling interval and a second status data polled at a second sampling interval immediately following the first sampling interval, the channel controller maintaining the derived status of each individual memory device; and at least one status register on which is stored a plurality of bits, each individual bit of the plurality of bits corresponding to an individual memory device of the plurality of memory devices and indicating the derived status of the individual memory device; wherein each individual bit corresponding to an individual memory device in the at least one status register is used to determine whether to check for a queued command destined for the individual memory device.