发明名称 MULTI LEVEL MEMORY DEVICE AND ITS DATA SENSING METHOD
摘要 According to the present invention, provided is a multi level memory device, in which a continuous flow of a cell current is not required during a detection of data stored in a memory cell, and a more significant bit determination operation of data stored in another memory cell during a determination of a less significant bit of data stored in the memory cell. The multi level memory device according to a first invention of the present invention includes: a more significant bit determination circuit for determining a plurality of more significant bits by comparing a cell current flowing in a memory cell with a predetermined reference current; a current/voltage conversion circuit for converting a copied cell current obtained by copying the cell current into a predetermined cell voltage to store the converted cell voltage; a charging time determination circuit for determining a charging time to convert the copied cell current into the predetermined cell voltage and store the converted cell voltage; and a less significant bit determination circuit for determining a plurality of less significant bits in response to a charging end signal outputted from the charging time determination circuit.
申请公布号 KR20160049085(A) 申请公布日期 2016.05.09
申请号 KR20140144746 申请日期 2014.10.24
申请人 SK HYNIX INC.;KOREA ADVANCED INSTITUTE OF SCIENCE AND TECHNOLOGY 发明人 RYU, SEUNG TAK;JIN, DONG HWAN;KWON, JI WOOK
分类号 G11C16/04;G11C16/26 主分类号 G11C16/04
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