发明名称 FINFET VERTICAL FLASH MEMORY
摘要 A plurality of fin structures containing, from bottom to top, a non-doped semiconductor portion and a second doped semiconductor portion of a first conductivity type, extend upwards from a surface of a first doped semiconductor portion of the first conductivity type. A trapping material (e.g., an electron-trapping material) is present along a bottom portion of sidewall surfaces of each non-doped semiconductor portion and on exposed portions of each first doped semiconductor portion. Functional gate structures straddle each fin structure. Metal lines are located above each fin structure and straddle each functional gate structure. Each metal line is orientated perpendicular to each functional gate structure and has a bottommost surface that is in direct physical contact with a portion of a topmost surface of each of the second doped semiconductor portions.
申请公布号 US2016126249(A1) 申请公布日期 2016.05.05
申请号 US201414527256 申请日期 2014.10.29
申请人 International Business Machines Corporation 发明人 Divakaruni Ramachandra;Kumar Arvind;Radens Carl J.
分类号 H01L27/115;H01L21/8234;H01L27/088 主分类号 H01L27/115
代理机构 代理人
主权项 1. A semiconductor structure comprising: a plurality of first doped semiconductor portions of a first conductivity type located on a topmost surface of a bulk semiconductor substrate; a plurality of fin structures extending upwards from a surface of each of said first doped semiconductor portions, wherein each fin structure of said plurality of fin structures includes from bottom to top, a non-doped semiconductor portion and a second doped semiconductor portion of said first conductivity type; a trapping material layer present along a bottom portion of sidewall surfaces of each non-doped semiconductor portion of each fin structure and on exposed portions of each first doped semiconductor portion; a plurality of functional gate structures straddling each fin structure of said plurality of fin structures; and a plurality of metal lines located above each fin structure of the plurality of fin structures and straddling each functional gate structure of said plurality of functional gate structures, wherein each metal line is orientated perpendicular to each functional gate structure and has a bottommost surface that is in direct physical contact with a portion of a topmost surface of each of said second doped semiconductor portions.
地址 Armonk NY US