| 发明名称 |
Vertical power transistor device |
| 摘要 |
A power metal-oxide-semiconductor field-effect transistor (MOSFET) includes a substrate, a drift layer over the substrate, and a spreading layer over the drift layer. The spreading layer includes a pair of junction implants separated by a junction gate field effect (JFET) region. A gate oxide layer is on top of the spreading layer. The gate contact is on top of the gate oxide layer. Each one of the source contacts are on a portion of the spreading layer separate from the gate oxide layer and the gate contact. The drain contact is on the surface of the substrate opposite the drift layer. |
| 申请公布号 |
US9331197(B2) |
申请公布日期 |
2016.05.03 |
| 申请号 |
US201313962295 |
申请日期 |
2013.08.08 |
| 申请人 |
Cree, Inc. |
发明人 |
Pala Vipindas;Agarwal Anant Kumar;Cheng Lin;Lichtenwalner Daniel Jenner;Palmour John Williams |
| 分类号 |
H01L27/108;H01L29/94;H01L29/66;H01L21/337;H01L21/8238;H01L29/78;H01L29/08;H01L29/10;H01L29/16 |
主分类号 |
H01L27/108 |
| 代理机构 |
|
代理人 |
Josephson Anthony J. |
| 主权项 |
1. A transistor device comprising a gate, a source, and a drain, wherein the gate and the source are separated from the drain by at least a JFET region, a spreading layer including a graded doping profile, and a drift layer, wherein a doping concentration of the spreading layer varies more than a factor of about 102 cm−3 between the JFET region and the drift layer. |
| 地址 |
Durham NC US |
