发明名称 REGION-BASED SYNTHESIS OF LOGIC CIRCUITS
摘要 Techniques for synthesized circuit design are described herein. The techniques include identifying a region of a synthesized logical circuit design, and un-mapping gates of the identified region. A logical resynthesis is performed on the unmapped gates based on a predetermined optimization for the identified region.
申请公布号 US2016117422(A1) 申请公布日期 2016.04.28
申请号 US201514862567 申请日期 2015.09.23
申请人 International Business Machines Corporation 发明人 Antony George;Kipnis Rina;Lev Oren;Liberchuk Vadim;Rangarajan Sridhar H.;Singh Vinay K.
分类号 G06F17/50 主分类号 G06F17/50
代理机构 代理人
主权项 1. A computer implemented method for synthesis of logical circuits, comprising: identifying a region of a synthesized logical circuit design; un-mapping gates of the identified region; and performing a logical resynthesis on the unmapped gates based on a predetermined optimization for the identified region.
地址 Armonk NY US