发明名称 Method and device for managing the time transition of a CMOS logic circuit as a function of temperature
摘要 A method includes generation of a first current proportional to absolute temperature and formation of a second current representative of the temperature variation of the threshold voltages of the transistors of the inverter and limited to a fraction of the first current. This fraction is less than one. The inverter is supplied with a supply current equal to the first current minus the limited second current.
申请公布号 US9325325(B2) 申请公布日期 2016.04.26
申请号 US201414502095 申请日期 2014.09.30
申请人 STMicroelectronics (Rousset) SAS 发明人 Gailhard Bruno;Cuenca Michel
分类号 H03L1/02;H03K19/0948;H03B5/04;H03K19/003;G05F3/26;G11C7/04 主分类号 H03L1/02
代理机构 Slater Matsil, LLP 代理人 Slater Matsil, LLP
主权项 1. A method for operating a CMOS logic circuit that comprises a PMOS transistor and an NMOS transistor, the method comprising: generating a first current proportional to absolute temperature; forming a second current representative of a temperature variation of threshold voltages of the PMOS and NMOS transistors of the logic circuit; using a current limiter to control the second current to be limited to a fraction of the first current, the fraction being less than one; and supplying the CMOS logic circuit with a supply current equal to the first current minus the second current.
地址 Roussett FR