发明名称 Write assist circuit, memory device and method
摘要 A write assist circuit includes a first switch, a second switch and a bias voltage circuit. The first switch connects a cell supply voltage node of a memory cell to a power supply voltage node in response to a write control signal having a first state, and disconnects the cell supply voltage node from the power supply voltage node in response to the write control signal having a second state. The bias voltage circuit generates, at an output thereof, an adjustable bias voltage lower than the power supply voltage. The second switch connects the cell supply voltage node to the output of the bias voltage circuit in response to the write control signal having the second state, and disconnects the cell supply voltage node from the output of the bias voltage circuit in response to the write control signal having the first state.
申请公布号 US9324413(B2) 申请公布日期 2016.04.26
申请号 US201313804405 申请日期 2013.03.14
申请人 TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD. 发明人 Ko Hsin-Hsin;Lin Yangsyu;Cheng Chiting;Lee Cheng Hung;Chang Jonathan Tsung-Yung
分类号 G11C7/00;G11C11/419 主分类号 G11C7/00
代理机构 Hauptman Ham, LLP 代理人 Hauptman Ham, LLP
主权项 1. A write assist circuit, comprising: a first switch coupled between a cell supply voltage node of a memory cell and a power supply voltage node, the first switch configured to connect the cell supply voltage node to the power supply voltage node for applying a power supply voltage on the power supply voltage node to the memory cell in response to a write control signal having a first state, anddisconnect the cell supply voltage node from the power supply voltage node in response to the write control signal having a second state, a bias voltage circuit configured to generate, at an output thereof, an adjustable bias voltage lower than the power supply voltage; and a second switch coupled between the cell supply voltage node and the output of the bias voltage circuit, the second switch configured to connect the cell supply voltage node to the output of the bias voltage circuit for applying the adjustable bias voltage lower than the power supply voltage to the memory cell in response to the write control signal having the second state, anddisconnect the cell supply voltage node from the output of the bias voltage circuit in response to the write control signal having the first state, wherein the bias voltage circuit and at least one of the first switch or the second switch are responsive to a write assist enable signal.
地址 TW