发明名称 |
Method for fabricating semiconductor device |
摘要 |
A method for fabricating semiconductor device is disclosed. The method includes the steps of: providing a substrate having at least one metal gate thereon, a source/drain region adjacent to two sides of the at least one metal gate, and an interlayer dielectric (ILD) layer around the at least one metal gate; forming a plurality of contact holes in the ILD layer to expose the source/drain region; forming a first metal layer in the contact holes; performing a first thermal treatment process; and performing a second thermal treatment process. |
申请公布号 |
US9324610(B2) |
申请公布日期 |
2016.04.26 |
申请号 |
US201414455939 |
申请日期 |
2014.08.10 |
申请人 |
UNITED MICROELECTRONICS CORP. |
发明人 |
Hung Ching-Wen;Wu Jia-Rong;Chang Tsung-Hung;Lin Ching-Ling;Lee Yi-Hui;Huang Chih-Sen;Chen Yi-Wei;Lin Chun-Hsien |
分类号 |
H01L21/02;H01L21/768;H01L29/78;H01L23/535;H01L29/66;H01L23/485;H01L23/532 |
主分类号 |
H01L21/02 |
代理机构 |
|
代理人 |
Hsu Winston;Margo Scott |
主权项 |
1. A method for fabricating semiconductor device, comprising:
providing a substrate having at least one metal gate thereon, a source/drain region adjacent to two sides of the at least one metal gate, a contact etch stop layer (CESL) around the at least one metal gate, and an interlayer dielectric (ILD) layer around the at least one metal gate, wherein the metal gate comprises a work function metal layer and a low resistance metal layer; removing part of the ILD layer to form a plurality of contact holes exposing the source/drain region, the CESL, and the metal gate; forming a first metal layer and a second metal layer in the contact holes, wherein the first metal layer contacts the CESL directly; performing a first thermal treatment process after forming the first metal layer and the second metal layer; and performing a second thermal treatment process to form a silicide on the source/drain region while no silicide is formed on the metal gate. |
地址 |
Science-Based Industrial Park, Hsin-Chu TW |