发明名称 APPARATUS AND METHOD FOR REDUCING COMMON MODE VOLTAGE OF THREE PHASE VOLTAGE SOURCE INVERTER
摘要 Provided are an apparatus and a method for reducing a common mode voltage of a three-phase voltage source inverter. An apparatus for reducing a common mode voltage when a three-phase voltage source inverter (VSI) is switched according to an embodiment of the present invention includes a future reference current calculation unit for calculating future reference currents at start and end points in a sampling section, respectively, a future load current calculation unit for calculating future load currents at the start and end points in the sampling section, respectively, a non-zero vector selecting unit for simultaneously selecting first and second voltage vectors, which minimize current error values at the starting points in the sampling section, from six non-zero vectors based on current values calculated by the future reference current calculation unit and the future load current calculation unit, and a switching section setting unit for setting switching times corresponding to the first and second voltage vectors in the sampling section, respectively.
申请公布号 KR101615482(B1) 申请公布日期 2016.04.26
申请号 KR20150061270 申请日期 2015.04.30
申请人 CHUNG ANG UNIVERSITY INDUSTRY ACADEMIC COOPERATION FOUNDATION 发明人 KWAK, SANG SHIN
分类号 H02M1/12;H02M7/48 主分类号 H02M1/12
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