| 摘要 |
Provided are a silicon carbide semiconductor device wherein withstand voltage deterioration of a withstand voltage structure is eliminated, and a method for manufacturing the silicon carbide semiconductor device. Disclosed is a silicon carbide semiconductor device wherein: p regions 31, 32 and a p region 33, which is an electric field relaxing region connected to a first p base region 10, are disposed under a step section 40; and the bottom surfaces of respective p regions 31, 32, 33 and the first p base region 10 are connected to each other substantially on a flat plane. The impurity concentration of the first base region is set equal to or higher than 4×1017cm-3, and the impurity concentration of the p region 33 is set to a value that is lower than the impurity concentration of the first base region 10 but higher than that of the p regions 31, 32, thereby eliminating withstand voltage deterioration of a withstand voltage structure 102. |
