SYSTEM AND METHOD FOR OBSTACLE-AVOIDING SIGNAL BUS ROUTING

摘要

Systems, methods, and other embodiments associated with providing obstacle-avoidance bus routing for an integrated circuit design are described. In one embodiment, a bus routing tool is disclosed that generates a plurality of escape nodes to construct a three-dimensional routing solution graph. The bus routing tool probes a design space of the integrated circuit design to dynamically determine a location of each escape node while avoiding path blockages within the design space. By traversing the three-dimensional routing solution graph from a leaf escape node near a target location within the design space back to a root escape node near a source location within the design space, a candidate routing solution for routing a signal bus from the source location to the target location may be determined.

主权项

1. A computer-implemented method comprising:
determining at least one candidate routing solution for routing a signal bus from a source location to a target location in a design space of an integrated circuit design representing an integrated circuit by: (i) generating, by a bus routing tool, a plurality of nodes having defined design space properties, starting with a root node proximate the source location and recursively expanding toward the target location, to construct a three-dimensional routing solution graph comprising the plurality of nodes and defining a routing solution domain between the source location and the target location; and (ii) traversing at least one path of nodes, by the bus routing tool, through the three-dimensional routing solution graph from at least one node, of the plurality of nodes, proximate the target location back to the root node, wherein the at least one path of nodes defines the at least one candidate routing solution.