MEMORY DEVICE AND SEMICONDUCTOR DEVICE

摘要

PROBLEM TO BE SOLVED: To provide a memory device capable of being reduced in a layout area.SOLUTION: A memory device includes: a sense amplifier 11 electrically connected to a first wiring BLa and a second wiring BLb and positioned in a first layer; and a first circuit 12a and a second circuit 12b which are positioned in a second layer over the first layer. The first circuit 12a includes: a first switch 13 the conduction state of which is controlled in accordance with a potential of a third wiring WLa; and a first capacitive element 14 electrically connected to the first wiring BLa via the first switch 13. The second circuit 12b includes: a second switch 13 the conduction state of which is controlled in accordance with a potential of a fourth wiring WLb; and a second capacitive element 14 electrically connected to the second wiring BLb via the second switch 13. The first wiring BLa intersects only the third wiring WLa in the second layer, and the second wiring BLb intersects only the fourth wiring WLb in the second layer.SELECTED DRAWING: Figure 1