发明名称 APPARATUS, SYSTEMS, AND METHODS FOR PROVIDING A MEMORY EFFICIENT CACHE
摘要 The present disclosure relates to apparatus, systems, and methods that implement a less-recently-used data eviction mechanism for identifying a memory block of a cache for eviction. The less-recently-used mechanism can achieve a similar functionality as the least-recently-used data eviction mechanism, but at a lower memory requirement. A memory controller can implement the less-recently-used data eviction mechanism by selecting a memory block and determining whether the memory block is one of the less-recently-used memory blocks. If so, the memory controller can evict data in the selected memory block; if not, the memory controller can continue to select other memory blocks until the memory controller selects one of the less-recently-used memory blocks.
申请公布号 US2016103765(A1) 申请公布日期 2016.04.14
申请号 US201414509597 申请日期 2014.10.08
申请人 HGST NETHERLANDS B.V. 发明人 RASTOGI Kanishk
分类号 G06F12/08;G06F9/46 主分类号 G06F12/08
代理机构 代理人
主权项 1. A method comprising: receiving, at a memory controller in a storage system coupled to a host device via an interface, a memory access request, wherein the memory access request comprises a memory block identifier that identifies a memory block; determining, at the memory controller, that data associated with the memory access request should be stored in one of memory blocks in the cache and that each of the memory blocks in the cache is already occupied with valid data; selecting, by the memory controller, one of the memory blocks; determining a first transaction count associated with the selected memory block, wherein the first transaction count is indicative of a time instance at which the selected memory block was accessed; and when the first transaction count satisfies a predetermined criterion, causing, by the memory controller, the selected memory block to store the data, and when the first transaction count does not satisfy the predetermined criterion, selecting, by the memory controller, another one of the memory blocks until the memory controller selects a memory block whose transaction count satisfies the predetermined criterion.
地址 Amsterdam NL