INTEGRATED ENHANCEMENT MODE AND DEPLETION MODE DEVICE STRUCTURE AND METHOD OF MAKING THE SAME

摘要

A circuit is provided that includes a castellated channel device that comprises a heterostructure overlying a substrate structure, a castellated channel device area formed in the heterostructure that defines a plurality of ridge channels interleaved between a plurality of trenches, and a three-sided castellated conductive gate contact that extends across the castellated channel device area. The three-sided gate contact substantially surrounds each ridge channel around their tops and their sides to overlap a channel interface of heterostructure of each of the plurality of ridge channels. The three-sided castellated conductive gate contact extends along at least a portion of a length of each ridge channel.

主权项

1. A circuit comprising:
a castellated channel device comprising:
a heterostructure overlying an underlying structure;a castellated channel device area formed in the heterostructure that defines a plurality of ridge channels interleaved between a plurality of trenches, wherein each trench of the plurality of trenches extends to a surface of the underlying structure; anda three-sided castellated conductive gate contact that extends across the castellated channel device area and substantially surrounds each ridge channel around its top and its sides to overlap a channel interface of each of the plurality of ridge channels, the three-sided castellated conductive gate contact extending along at least a portion of a length of each ridge channel.