Driver with separate power sources and display device using the same

摘要

A driver and a display device using the same may be provided. The driver, according to an exemplary embodiment includes at least one logic unit, receiving a plurality of clock signals and a plurality of input signals, to generate and sequentially transmit output signals to a plurality of pixel rows included in a display unit, and a buffer unit, receiving a plurality of control signals, to generate and simultaneously transmit the output signals of a same waveform to a plurality of pixels included in the display unit, wherein the at least one logic unit is supplied with a logic power source voltage, and the buffer unit is supplied with a buffer power source voltage, the buffer power source voltage being different from the logic power source voltage.

主权项

1. A driver, comprising:
at least one logic circuit to receive a plurality of clock signals and a plurality of input signals to generate and sequentially transmit first and second output signals to a plurality of pixel rows included in a display; and a buffer, receiving the first output signal, the second output signal, a first control signal, and a second control signal, to generate and transmit a light emission control signal of a same waveform to a plurality of pixels included in the display, wherein the at least one logic circuit includes a first logic circuit receiving the plurality of clock signals and a first input signal to generate the first output signal, and a second logic circuit receiving the plurality of clock signals and a second input signal to generate the second output signal, wherein the at least one logic circuit is supplied with a logic power source voltage, and the buffer is supplied with a buffer power source voltage, wherein the buffer power source voltage is different from the logic power source voltage, and wherein in a case of a simultaneous driving mode in which the light emission control signal is simultaneously output with a same waveform, the first input signal and the second input signal are transmitted with a gate-off voltage level to the first logic circuit and the second logic circuit, such that the first logic circuit and the second logic circuit, respectively, are not operated.