发明名称 Light-emitting diode fabrication method
摘要 A LED fabrication method includes: providing a substrate; forming a low-temperature AlxGa1-xN (0≦x≦1) layer over the growth substrate; setting the growth pressure from high to low and temperature and rotation rate from low to high to realize change from three-dimensional growth to two-dimensional growth of the GaN structure layer before growth of the multiple quantum-well layer, in which, Si is doped at position approximate to the multiple quantum-well layer to form an undoped gradient GaN layer and an N-type gradient GaN layer; growing a multiple quantum-well layer, an AlxGa1-xN (0≦x≦1) layer and a P-type layer; and during later chip fabrication, dividing the epitaxial wafer over the etched N-type platform into chip grains and immersing them in chemical solutions for wet etching; and forming an inverted pyramid structure with rough side wall over the multiple quantum-well layer to improve light-emitting efficiency.
申请公布号 US9312434(B1) 申请公布日期 2016.04.12
申请号 US201514750351 申请日期 2015.06.25
申请人 TIANJIN SANAN OPTOELECTRONICS CO., LTD. 发明人 Shu Li-Ming;Liu Xiao-Feng;Zhang Dong-Yan;Liu Ming-Ying;Wang Liang-Jun;Wang Du-Xiang
分类号 H01L33/46;H01L21/00;H01L33/06;H01L33/00;H01L33/32;H01L33/14;H01L33/24;H01L33/30;H01L33/02;H01L33/22;H01L33/12 主分类号 H01L33/46
代理机构 Syncoda LLC 代理人 Syncoda LLC ;Ma Feng;Feng Junjie
主权项 1. A method of fabricating a light-emitting diode, comprising: providing a substrate; growing over the substrate a low-temperature AlxGa1-xN (0≦x≦1) buffer layer, an undoped gradient GaN layer, an N-type gradient GaN layer, a multiple quantum-well layer, an AlxGa1-xN (0≦x≦1) electron blocking layer and a P-type layer; wherein after growth of the buffer layer, set the growth pressure from high to low and temperature and rotation rate from low to high to realize change from three-dimensional growth to two-dimensional growth of the GaN structure layer before growth of the multiple quantum-well layer by changing critical layer thickness over the substrate surface and lateral and vertical growth rate and Si is doped at position proximal to the multiple quantum-well layer to form an undoped gradient GaN layer and an N-type gradient GaN layer with gradient growth mode; during later chip fabrication, dividing the epitaxial wafer over the etched N-type platform into chip grains and immersing them in chemical solutions for wet etching; and forming an inverted pyramid structure with rough side wall over the GaN structure layer to improve light-emitting efficiency.
地址 Tianjin CN