Semiconductor device

摘要

A first impurity diffusion region is provided within a semiconductor substrate, a second impurity diffusion region is provided within the first impurity diffusion region, a third impurity diffusion region is provided within the second impurity diffusion region, a first portion of a fourth impurity diffusion region is provided within the second impurity diffusion region so as to be spaced from the third impurity diffusion region, and a second portion of the fourth impurity diffusion region is provided in a third portion of the first impurity diffusion region on a side of a surface of the semiconductor substrate, a first contact is provided so as to be in contact with the second portion, the first contact and the third portion overlap in plan view, and a first power supply is connected to the third impurity diffusion region.

主权项

1. A semiconductor device comprising:
a semiconductor substrate of a first conductivity type; a first impurity diffusion region of a second conductivity type; a second impurity diffusion region of the first conductivity type; a third impurity diffusion region of the second conductivity type; a fourth impurity diffusion region of the second conductivity type; a first contact; a first power supply; and a first gate; wherein: the first impurity diffusion region is provided within the semiconductor substrate; the second impurity diffusion region is provided within the first impurity diffusion region; the third impurity diffusion region is provided within the second impurity diffusion region; a first portion of the fourth impurity diffusion region is provided within the second impurity diffusion region so as to be spaced from the third impurity diffusion region, and a second portion of the fourth impurity diffusion region is provided in a third portion of the first impurity diffusion region on a side of a surface of the semiconductor substrate; the first portion and the second portion are continuous; the first contact is provided so as to be in contact with the second portion; the first contact and the third portion overlap in plan view; the first power supply is connected to the third impurity diffusion region; the first gate is provided on an upper portion of the second impurity diffusion region between the fourth impurity diffusion region and the third impurity diffusion region; the first gate is connected to a GND; and a part of the first gate overlaps the fourth impurity diffusion region in plan view.