发明名称 Methods and circuit structures for mitigating voltage stresses on printed circuit board (PCB) in high voltage devices
摘要 A method for mitigating voltage stress on a PCB includes applying AC voltage to a multi-terminal condenser structure of a multi-layered PCB. The terminal condenser structure is formed by overlapping a plurality of conductive traces between board layers of the multi-layered PCB. A corresponding dielectric layer is disposed between the overlapping conductive traces of the board layers. The overlapping conductive traces include a first terminal, a second terminal, a third terminal, and a fourth terminal. The first terminal and the third terminal are disposed on a first layer of the multi-layered PCB, and the second terminal and the fourth terminal are disposed on a bottom layer of the multi-layered PCB. The first terminal and the second terminal are connected to a ground point, and the third terminal and the fourth terminal are connected to the AC voltage. Voltage stresses on the PCB are mitigated utilizing the multi-terminal condenser structure.
申请公布号 US9313878(B2) 申请公布日期 2016.04.12
申请号 US201414206366 申请日期 2014.03.12
申请人 DOBLE ENGINEERING COMPANY 发明人 Woodward, Jr. Robert Clark
分类号 G06F17/50;H05K1/02;H05K1/16 主分类号 G06F17/50
代理机构 Brinks Gilson & Lione 代理人 Brinks Gilson & Lione
主权项 1. A method for mitigating voltage stresses on a printed circuit board (PCB), comprising: forming a multi-terminal condenser structure on a multi-layered PCB and the multi-terminal condenser structure is configured to by-pass electric fields of an alternating current (AC) voltage applied to the multi-terminal condenser structure, which powers circuitries external to the multi-terminal condenser structure, wherein the multi-terminal condenser structure itself is free from having PCB components mounted thereon, wherein: the multi-terminal condenser structure is formed by overlapping a plurality of conductive traces disposed between board layers of the multi-layered PCB, a corresponding dielectric layer is disposed between the plurality of overlapping conductive traces of the board layers, wherein the plurality of overlapping conductive traces comprise: at least a first terminal a second terminal, a third terminal and a fourth terminal, wherein the first terminal and the third terminal are disposed on the first layer of the multi-layered PCB, and the second terminal and the fourth terminal are disposed on the bottom layer of the multi-layered PCB;wherein the first terminal and the second terminal are connected to a ground point as the only return ground point for AC currents, and the third terminal and the fourth terminal are connected to the AC voltage; and mitigating voltage stresses on the PCB utilizing the multi-terminal condenser structure to by-pass the AC currents from the applied AC voltage to the ground point.
地址 Watertown MA US