发明名称 Connecting interface unit and memory storage device
摘要 A connecting interface unit and a memory storage device without a crystal oscillator are provided and include a frequency detector, a phase detector, an oscillator, a sampling circuit and a transmitter circuit. The frequency detector and the phase detector respectively detect frequency difference and phase difference between an input signal from a host system and a reference signal to generate a frequency signal and a phase signal. The frequency signal and the phase signal that have passed through a filter are transmitted to the oscillator to generate the reference signal for generating a clock signal. The sampling circuit generates an input data signal according to the reference signal. The transmitter circuit modulates an output data signal according to the clock signal to generate and transmit an output signal to the host system. Accordingly, the connecting interface unit conforms to the specification of a transmission stand.
申请公布号 US9311231(B2) 申请公布日期 2016.04.12
申请号 US201314061719 申请日期 2013.10.23
申请人 PHISON ELECTRONICS CORP. 发明人 Chen Wei-Yung
分类号 G06F12/02;H04L7/033;G06F13/40;G06F1/06 主分类号 G06F12/02
代理机构 Jianq Chyun IP Office 代理人 Jianq Chyun IP Office
主权项 1. A connecting interface unit without a crystal oscillator, comprising: a frequency detector configured to receive an input signal from a host system, and to detect a frequency difference between the input signal and a first reference signal to generate a first frequency signal; a phase detector configured to receive the input signal from the host system, and to detect a phase difference between the input signal and the first reference signal to generate a first phase signal; at least one filter configured to filter the first frequency signal to generate a second frequency signal, and to filter the first phase signal to generate a second phase signal; an oscillator coupled to the at least one filter, the frequency detector and the phase detector, and configured to oscillate according to the second frequency signal and the second phase signal to generate the first reference signal, wherein the first reference signal is for generating a clock signal; a first sampling circuit coupled to the oscillator and configured to generate an input data signal according to the first reference signal; a transmitter circuit, not receiving a reference clock from a crystal oscillator, coupled to the oscillator and configured to modulate an output data signal according to the clock signal to generate an output signal, and to transmit the output signal to the host system; and a storage unit coupled to the at least one filter and the oscillator, and configured to store an oscillation information of the second frequency signal or the second phase signal if an amplitude of the input signal conforms to a threshold condition, wherein the storage unit is configured to provide the oscillation information to the oscillator if the amplitude of the input signal does not conform to the threshold condition, and the oscillator is configured to oscillate according to the oscillation information to generate the first reference signal.
地址 Miaoli TW
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