发明名称 DISPLAY HAVING VERTICAL GATE LINE EXTENSIONS AND MINIMIZED BORDERS
摘要 A display may have an array of pixels arranged in rows and columns. Each pixel may have a transistor for controlling the amount of output light associated with that pixel. The transistors may be thin-film transistors having active areas, first and second source-drain terminals, and gates. Gate lines may be used to distribute gate control signals to the gates of the transistors in each row. Data lines that run perpendicular to the gate lines may be used to distribute image data along columns of pixels. The gate lines may be connected to gate line extensions that run parallel to the data lines. The data lines may each overlap a respective one of the gate line extensions. Vias may be used to connect the gate line extensions to the gate lines. The gate line extensions may all have the same length.
申请公布号 WO2016053722(A1) 申请公布日期 2016.04.07
申请号 WO2015US51795 申请日期 2015.09.23
申请人 APPLE INC. 发明人 CHIU, HAO-LIN;YANG, BYUNG DUK;HUANG, CHUN-YAO;KIM, KYUNG WOOK;CHANG, SHIH CHANG;LEE, SZU-HSIEN
分类号 G09F9/30;G02F1/1345 主分类号 G09F9/30
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