发明名称 TIMING CONTROL WITH BODY-BIAS
摘要 Aspects of the present disclosure are directed to operating time-based circuitry. As may be implemented in connection with one or more embodiments, an apparatus and or method involved detecting timing characteristics of circuitry operating in respective clock domains, each having a semiconductor body region via which a clock signal path traverses. The respective semiconductor body regions are biased at respective bias levels that are based on the detected timing characteristics of the clock signal path that traverses the semiconductor body region being biased.
申请公布号 US2016098062(A1) 申请公布日期 2016.04.07
申请号 US201414504789 申请日期 2014.10.02
申请人 NXP B.V. 发明人 Sharma Vibhu;Kapoor Ajay;Malzahn Ralf
分类号 G06F1/10 主分类号 G06F1/10
代理机构 代理人
主权项 1. An apparatus comprising: a plurality of circuits operating in respective clock domains, each circuit including a semiconductor body region via which at least one clock signal path traverses; a clock circuit configured and arranged to generate and provide respective clock signals for each clock domain; a plurality of timing sensors including, for at least one of the circuits in each clock domain, a timing sensor configured and arranged to detect timing characteristics of the at least one clock signal path; and a plurality of local bias circuits including, for the semiconductor body region in at least one of the circuits in each clock domain, a bias circuit coupled to the semiconductor body region and configured and arranged to bias the semiconductor body region at a bias level that is based on the detected timing characteristics of the at least one clock signal path that traverses the semiconductor body region.
地址 Eindhoven NL