Server and power chip detecting method

摘要

A power chip detecting device, applied in a server, includes a power chip, a power sequence control module, a base management controller, a GPIO module, and a signal detecting module. The power sequence control module sends an initial power enable signal to the power chip after the server is switched on, and the power sequence control module receives an initial power good signal from the power chip after the power chip receives the initial power enable signal. The signal detecting module sends a time abnormal result to the GPIO module after determining that time difference between sending out of the initial power enable signal and the initial power good signal is less than a reference value. The GPIO module sends the time abnormal result to the base management controller.

主权项

1. A server, comprising:
a power chip; a power sequence control module, the power sequence control module is configured to send an initial power enable signal to the power chip after the server is switched on, and the power sequence control module is configured to receive an initial power good signal from the power chip after the power chip receives the initial power enable signal; a base management controller; a GPIO module; and a signal detecting module, the signal detecting module is configured to send a time abnormal result to the GPIO module after determining that time difference between sending out of the initial power enable signal and the initial power good signal is less than a reference value; wherein the GPIO module is configured to send the time abnormal result to the base management controller.