Methodology for testing integrated circuits

摘要

An integrated circuit is disclosed. The integrated circuit includes input and output pads, a first integrated circuit portion having first circuitry, and a second integrated circuit portion having second circuitry different from the first circuitry. The first integrated circuit portion is configured to provide an input test signal from the input pad to the second integrated circuit portion, and provide an output test signal from the second integrated circuit portion to the output pad, the output test signal being generated by second integrated circuit portion in response to the input test signal.

主权项

1. An integrated circuit, comprising:
input and output pads; a first integrated circuit portion having first circuitry, wherein the first integrated circuit portion comprises a processor and a memory; and a second integrated circuit portion having second circuitry different from the first circuitry, wherein the second integrated circuit portion comprises a transmitter and a digital-to-analog converter, or a receiver and an analog-to-digital converter; wherein the first integrated circuit portion is configured to:
provide an input test signal from the input pad to the second integrated circuit portion,
wherein the input test signal comprises a mode signal that signals the second integrated circuit portion to be in a test mode,wherein each of the first and second integrated circuit portions comprises one or more die-to-die pads, and the first and second integrated circuit portions are electrically connected together through their respective one or more die pads,wherein the mode signal is provided to the second integrated circuit portion via the one or more die pads, andwherein the processor and the memory are coupled to the at least one or more die pads, and the transmitter and the digital-to-analog converter or the receiver and the analog-to-digital converter are coupled to the one or more die pads; andprovide an output test signal from the second integrated circuit portion to the output pad, the output test signal being generated by the second integrated circuit portion in response to the input test signal.