发明名称 | Integrated capacitor based power distribution | ||
摘要 | An embodiment provides power (having low voltage, high current, and high current density) to ultra low voltage non-CMOS based devices using a distributed capacitor that is integrated onto the same chip as the non-CMOS devices. For example, an embodiment provides a spin logic gate adjacent dielectric material and first and second plates of a capacitor. The capacitor discharges low voltage/high current to the spin logic gate using a step down switched mode power supply that charges numerous capacitors during one clock cycle (using a switching element configured in a first orientation) and discharges power from the capacitors during the opposite clock cycle (using the switching element configured in a second orientation). The capacitors discharge the current out of plane and to the spin logic devices without having to traverse long power dissipating interconnect paths. Other embodiments are described herein. | ||
申请公布号 | US9305629(B2) | 申请公布日期 | 2016.04.05 |
申请号 | US201313976053 | 申请日期 | 2013.03.15 |
申请人 | Intel Corporation | 发明人 | Manipatruni Sasikanth;Nikonov Dmitri E.;Young Ian A. |
分类号 | G11C11/16;G11C5/14 | 主分类号 | G11C11/16 |
代理机构 | Trop, Pruner & Hu, P.C. | 代理人 | Trop, Pruner & Hu, P.C. |
主权项 | 1. An apparatus comprising: a supply voltage plane that includes an array of supply voltage lines; a ground plane that includes an array of ground lines; an array of capacitors formed from the arrays of supply voltage lines and ground lines; a first capacitor, formed at a first intersection between a first supply voltage line, included in the array of supply voltage lines, and a first ground line, included in the array of ground lines; wherein the capacitor comprises a first plate that includes a portion of the first supply voltage line, a second plate that includes a portion of the first ground line, and a first dielectric formed between the first and second plates; a device, to electrically couple to the capacitor, comprising at least one of a tunnel field-effect transistor, spin transfer torque (STT) memory, and a spin logic device; and a switching element coupled to the capacitor and included within a switching mode power supply; wherein (a) the array of capacitors, which includes the first capacitor, the device, and the switching element are all formed on a single monolithic substrate; and (b) the switching element discharges the capacitor to drive current between the first and second plates and then to the device. | ||
地址 | Santa Clara CA US |