发明名称 Hardware-based array compression
摘要 Technologies are generally described herein for compressing an array using hardware-based compression and performing various instructions on the compressed array. Some example technologies may receive an instruction adapted to access an address in an array. The technologies may determine whether address is compressible. If the address is compressible, then the technologies may determine a compressed address of a compressed array based on the address. The compressed array may represent a compressed layout of the array where a reduced size of each compressed element in the compressed array is smaller than an original size of each element in the array. The technologies may access the compressed array at the compressed address in accordance with the instruction.
申请公布号 US9304898(B2) 申请公布日期 2016.04.05
申请号 US201113497442 申请日期 2011.08.30
申请人 Empire Technology Development LLC 发明人 Solihin Yan
分类号 G06F7/00;G06F17/00;G06F12/02;G06F17/30 主分类号 G06F7/00
代理机构 Turk IP Law, LLC 代理人 Turk IP Law, LLC
主权项 1. A method to compress an array, comprising: receiving, by a computer having a processor and a memory, an instruction to access the array at a first memory address; upon receiving the instruction, determining, by the computer, the first memory address is compressible; responsive to determining the first memory address is compressible, determining, by the computer, a first compressed memory address of a compressed array based on the first memory address, the compressed array representing a compressed layout of the array where a reduced size of individual ones of compressed elements in the compressed array is smaller than an original size of individual ones of elements in the array, wherein the first memory address is determined to be compressible when the first memory address is within a particular address range of the compressed array; upon determining the first compressed memory address of the compressed array, accessing, by the computer, the compressed array at the first compressed memory address instead of the first memory address in accordance with the instruction; receiving a store instruction to store second data in the array at a second memory address; determining that the second memory address is compressible when the store instruction is received; determining a second compressed memory address of the compressed array based on the second memory address when the second memory address is determined to be compressible; forming, by the computer a combined index by combining an index to an overflow region in the compressed array with existing data from the compressed array at the second compressed memory address, wherein the overflow region is a portion of the particular address range that is not occupied by the compressed array, the index to the overflow region is a next available overflow element in the overflow region, and the combined index is a combination of the index to the overflow region and data from the compressed array at the second compressed memory address; storing the combined index in the compressed array at the second compressed memory address; updating a status bit in the compressed array to indicate that the compressed array stores the index to the overflow region within the combined index in the compressed array at the second compressed address; storing the second data in the overflow region at the index when the status bit in the compressed array is updated to indicate that the compressed array stores the index; and retrieving the second data from the compressed array based on the status bit.
地址 Wilmington DE US