| 发明名称 |
FILLER INSERTION IN CIRCUIT LAYOUT |
| 摘要 |
A method for filler insertions in a circuit layout having a cell row of standard cells and gaps between the standard cells is disclosed. First, a set of filler classes, each filler class having a set of filler cells, is classified that are configured to fill the gaps depending on a design requirement. Then, a filler insertion pattern based on a required ratio is identified such that horizontal and vertical density of the set of filler classes in the circuit layout are as per the required ratio and the cell row of the circuit layout has at least one filler cell from each of the set of filler classes. |
| 申请公布号 |
US2016092624(A1) |
申请公布日期 |
2016.03.31 |
| 申请号 |
US201414496774 |
申请日期 |
2014.09.25 |
| 申请人 |
Texas Instruments Incorporated |
发明人 |
Somayaji Ananth;Modi Sourav;Dewal Sani;Ambikapathy Saravanan |
| 分类号 |
G06F17/50 |
主分类号 |
G06F17/50 |
| 代理机构 |
|
代理人 |
|
| 主权项 |
1. A method for filler insertions in a circuit layout having a cell row of standard cells and gaps between the standard cells, comprising:
classifying a set of filler classes, each filler class having a set of filler cells, that are configured to fill the gaps depending on a design requirement; identifying a required ratio of the set of filler classes that fills the gaps in the circuit layout; and identifying a filler insertion pattern based on the required ratio such that horizontal and vertical density of the set of filler classes in the circuit layout are as per the required ratio and the cell row of the circuit layout has at least one filler cell from each of the set of filler classes. |
| 地址 |
Dallas TX US |
