Building a run list for a coprocessor based on rules when the coprocessor switches from one context to another context

摘要

Techniques for minimizing coprocessor “starvation,” and for effectively scheduling processing in a coprocessor for greater efficiency and power. A run list is provided allowing a coprocessor to switch from one task to the next, without waiting for CPU intervention. A method called “surface faulting” allows a coprocessor to fault at the beginning of a large task rather than somewhere in the middle of the task. DMA control instructions, namely a “fence,” a “trap” and a “enable/disable context switching,” can be inserted into a processing stream to cause a coprocessor to perform tasks that enhance coprocessor efficiency and power. These instructions can also be used to build high-level synchronization objects. Finally, a “flip” technique is described that can switch a base reference for a display from one location to another, thereby changing the entire display surface.

主权项

1. A method for scheduling coprocessor contexts for processing in a coprocessor, comprising:
a central processing unit (CPU) generating a run list comprising a list of coprocessor contexts for processing by the coprocessor; delivering the run list to a scheduler, the scheduler preparing the contexts on the run list for processing by the coprocessor, the coprocessor beginning to process a first context of the run list based on an order indicated in the run list; while processing the first context, determining, by the coprocessor, that a switching event has occurred, the switching event comprising a page fault in the coprocessor processing the first context, a general protection fault in the coprocessor processing the first context, or a determination that there is not another item in the run list; switching, by the coprocessor, to a next context in a second run list in response to the coprocessor determining that the switching event has occurred, the coprocessor switching to the next context independently of intervention from the CPU, wherein the scheduler generates the second run list based on one or more rules including: excluding the first context of the run list from appearing in the second run list, and wherein a second context of the run list is a first context of the second run list; signaling the CPU with a first interrupt signal based at least upon the coprocessor switching from one context in the run list to a next context in the run list, the CPU building said second run list for the coprocessor in response to the CPU receiving the first interrupt signal from the coprocessor; and signaling the CPU with a second interrupt signal based at least upon the processor switching from the run list to the second run list, the CPU building a third run list for the coprocessor in response to the CPU receiving the second interrupt signal from the coprocessor.