Fin transistor and semiconductor integrated circuit including the same

摘要

Provided are a fin transistor including a plurality of fins and a semiconductor integrated circuit including a plurality of fin transistors. A width of at least one fin of the plurality of fins is different from widths of the other fins, and each width of the plurality of fins is individually determined based on the electrical characteristics of the fin transistor.

主权项

1. A multi-fin transistor comprising:
a plurality of fins; and a common gate electrode above the plurality of fins, wherein a width of at least one fin of the plurality of fins is different from widths of the other fins, and each width of the plurality of fins is individually determined based on electrical characteristics of the multi-fin transistor, wherein the width of the at least one fin is indicated in a design unit by a mark layer to change the width based on the electrical characteristics of the multi-fin transistor wherein the width of the at least one fin is changed in the design unit according to a new library generated by using the mark layer, and wherein the mark layer comprises at least one of,
a first mark layer configured to indicate an increase in a width of at least one fin set in a previously designed layout, anda second mark layer configured to indicate a decrease in the width of the at least one fin set to the previously designed layout.