Register management in an extended processor architecture

摘要

Systems and methods are disclosed for enhancing the throughput of a processor by minimizing the number of transfers of data associated with data transfer between a register file and a memory stack. The register file used by a processor running an application is partitioned into a number of blocks. A subset of the blocks of the register file is defined in an application binary interface enabling the subset to be pre-allocated and exposed to the application binary interface. Optionally, blocks other than the subset are not exposed to the application binary interface so that the data relating to application function switch or a context switch is not transferred between the unexposed blocks and a memory stack.

主权项

1. A computer-implemented method for enhancing the throughput of a processor, comprising:
logically partitioning a register file used by a processor into a plurality of blocks, each block having a plurality of registers; defining, in an application binary interface (ABI), a subset of the blocks of the register file to pre-allocate and expose the subset to the ABI; preventing exposure of blocks other than those in the subset to the ABI, so that data is not transferred between the unexposed blocks and a memory upon function and context switches; and allocating blocks, using an allocate instruction set, wherein prior to allocation, the allocated blocks were unexposed to the ABI, and wherein allocating block further comprises:
determining whether a continuous number of bits equal to a number of blocks to be allocated exist in a block bit vector;based on determining that the continuous number of bits exist, calling an allocate library function an amount of times equal to the continuous number of blocks that exist; andbased on determining that the continuous number of bits do not exist, utilizing a reallocation instruction set to perform at least one of compacting and defragmenting of a logical register and a physical register.