Liquid crystal display device

摘要

A display device includes a first gate signal line and a second gate signal line, and a first drain signal line, a second drain signal line, and a third drain signal line. A first pixel and a second pixel are surrounded by the first gate signal line, the second gate signal line, the first drain signal line, and the second drain signal line, and a third pixel and a fourth pixel are surrounded by the first gate signal line, the second gate signal line, the second drain signal line, and the third drain signal line. A first storage line and a second storage line are disposed between the first gate signal line and the second gate signal line, and the first pixel includes a first thin film transistor connected to the first gate signal line, the first drain signal line, and a first pixel electrode of the first pixel.

主权项

1. A display device comprising:
a first gate signal line and a second gate signal line; a first drain signal line, a second drain signal line, and a third drain signal line; a first pixel and a second pixel surrounded by the first gate signal line, the second gate signal line, the first drain signal line, and the second drain signal line, and a third pixel and a fourth pixel surrounded by the first gate signal line, the second gate signal line, the second drain signal line, and the third drain signal line; and a first storage line and a second storage line disposed between the first gate signal line and the second gate signal line, wherein the first pixel comprises a first thin film transistor connected to the first gate signal line, the first drain signal line, and a first pixel electrode of the first pixel, wherein the second pixel comprises a second thin film transistor connected to the second gate signal line, the second drain signal line, and a second pixel electrode of the second pixel, wherein the third pixel comprises a third thin film transistor connected to the second drain signal line and a third pixel electrode of the third pixel, wherein the first storage line is disposed adjacent to the first thin film transistor and the second storage line is disposed adjacent to the second thin film transistor, and wherein a third storage line is disposed between the first pixel electrode and the second pixel electrode, and connected to the first storage line and the second storage line.