发明名称 Methods for forming passivation protection for an interconnection structure
摘要 Methods for forming a passivation protection structure on a metal line layer formed in an insulating material in an interconnection structure are provided. In one embodiment, a method for forming passivation protection on a metal line in an interconnection structure for semiconductor devices includes selectively forming a metal capping layer on a metal line bounded by a dielectric bulk insulating layer in an interconnection structure formed on a substrate in a processing chamber incorporated in a multi-chamber processing system, in-situ forming a barrier layer on the substrate in the processing chamber; wherein the barrier layer is a metal dielectric layer, and forming a dielectric capping layer on the barrier layer in the multi-chamber processing system.
申请公布号 US9299605(B2) 申请公布日期 2016.03.29
申请号 US201414201728 申请日期 2014.03.07
申请人 APPLIED MATERIALS, INC. 发明人 Ren He;Naik Mehul B.;Cao Yong;Kesapragada Sree Rangasai V.;Shek Mei-Yee;Cheng Yana
分类号 H01L21/02;H01L21/768 主分类号 H01L21/02
代理机构 Patterson & Sheridan, LLP 代理人 Patterson & Sheridan, LLP
主权项 1. A method for forming passivation protection on a metal line in an interconnection structure for semiconductor devices, comprising: selectively forming a metal capping layer on a metal line bounded by a dielectric bulk insulating layer in an interconnection structure formed on a substrate in a processing chamber incorporated in a multi-chamber processing system; in-situ forming a barrier layer on the substrate in the processing chamber; wherein the barrier layer is a metal dielectric layer; and forming a dielectric capping layer on the barrier layer in the multi-chamber processing system, wherein the dielectric capping layer is a low dielectric constant material having a dielectric constant less than 4.
地址 Santa Clara CA US