发明名称 DEBUG CIRCUIT, SEMICONDUCTOR DEVICE, AND DEBUG METHOD
摘要 A debug circuit, includes: a controller to start a debugging of a circuit based on first and second code values, the first code value obtained by encoding a first sequence included in a processing sequence indicating a condition for a process of the circuit, the second code value obtained by encoding a second sequence subsequent to the first sequence, wherein the controller performs to: calculate a third code value as a current code value based on signals input and output to the circuit; output, as a fourth code value, a previous third code value that is earlier than the current code value; detect the first sequence by comparing a difference between the third code value and the fourth code value with the first code value; calculate a first expected value of the third code value; and perform the process when the third code value and the first expected value match.
申请公布号 US2016084906(A1) 申请公布日期 2016.03.24
申请号 US201514751405 申请日期 2015.06.26
申请人 FUJITSU LIMITED 发明人 Tamiya Yutaka
分类号 G01R31/317;G01R31/3177 主分类号 G01R31/317
代理机构 代理人
主权项 1. A debug circuit, comprising: a controller configured to start a debugging of a circuit to be debugged based on a first code value and a second code value, the first code value being obtained by encoding, using an encoding system, a first sequence included in a processing sequence indicating a condition for a process of the circuit, the second code value being obtained by encoding, using the encoding system, a second sequence subsequent to the first sequence included in the processing sequence, wherein the controller performs operations to: calculate, using an encoding system, a third code value as a current code value based on signals input and output to the circuit; output, as a fourth code value, a previous third code value that is earlier than the current core value by a time length corresponding to a length of the first sequence; detect the first sequence based on a result of comparing a difference between the third code value and the fourth code value with the first code value; calculate a first expected value of the third code value at an end of the processing sequence, based on the third code value when detecting the first sequence and the second code value; and perform the process on the circuit when the third code value and the first expected value match with each other.
地址 Kawasaki-shi JP