发明名称 RECONFIGURABLE LOGIC GATES USING CHAOTIC DYNAMICS
摘要 The present invention provides apparatuses and methods for chaos computing. For example, a chaos-based logic block comprises an encoding circuit block, at least one chaotic circuit block, a bias voltage generating circuit block, and a threshold circuit block. The encoding circuit block converts a plurality of digital inputs to an analog output. The plurality of digital inputs may comprise at least one data input and at least one control input. At least one chaotic circuit block is configured to iterate converting an input signal to an output signal by feeding the output signal to at least one chaotic circuit as the input signal at each iteration. The bias voltage generating circuit block converts a plurality of binary control inputs to a bias voltage. The threshold circuit block compares the output signal with a predetermined threshold, thereby generating a digital signal.
申请公布号 US2016087634(A1) 申请公布日期 2016.03.24
申请号 US201514640342 申请日期 2015.03.06
申请人 University of Hawaii 发明人 Ditto William;Kia Behnam
分类号 H03K19/177;H03M1/34 主分类号 H03K19/177
代理机构 代理人
主权项 1. A chaos-based logic block for chaos computing, comprising: an encoding circuit block converting a plurality of digital inputs to an analog output, the plurality of digital inputs comprising at least one data input and at least one control input; at least one chaotic circuit block coupled to the encoding circuit block, the at least one chaotic circuit block is configured to iterate converting an input signal to an output signal by feeding the output signal to the at least one chaotic circuit as the input signal at each iteration; a bias voltage generating circuit block coupled to the at least one chaotic circuit block, converting a plurality of binary control inputs to a bias voltage; and a threshold circuit block coupled to the at least one chaotic circuit block, comparing the output signal with a predetermined threshold to generate a digital signal.
地址 Honolulu HI US