Systems and methods for resolving clock time between asynchronous time domains

摘要

The techniques for resolving asynchronous clock times include determining at least a high resolution time period and a low resolution time period for a clock of a first time domain, generating a plurality of sequenced transition signals for the high resolution time period where each sequenced transition signal corresponds to a respective bit transition period of the high resolution clock of the first time domain, encoding the plurality of sequenced transition signals for the high resolution time period into a high resolution vector, and encoding the low resolution time period into a low resolution vector.

主权项

1. A method for resolving clock time between at least two asynchronous clock domains, the method comprising:
determining, via a digital circuit, at least a high resolution time period and a low resolution time period for a clock of a first time domain; generating, via the digital circuit, a plurality of sequenced transition signals for the high resolution time period, wherein each sequenced transition signal corresponds to a respective bit transition period of the high resolution time period of the first time domain; encoding, via the digital circuit, the plurality of sequenced transition signals for the high resolution time period into a high resolution vector; and encoding, via the digital circuit, the low resolution time period into a low resolution vector.