| 摘要 |
PROBLEM TO BE SOLVED: To provide an arithmetic processing unit for processing data input from at least two transmission sources, which has a circuit with limited size and appropriately-adjusted bus usage rates of the transmission sources.SOLUTION: The arithmetic processing unit according to the present invention has a plurality of selection circuits 3 connected in series, at least one of the selection circuit including: a plurality of input units 33 for receiving data from a transmission source or a selection circuit 3 at a front stage; a selection unit 34b for selecting a first input unit 33 from one or more input units 33 which has received data; a transfer unit 35a for transferring first data input from the first input unit 33 selected by the selection unit 34b to a transfer destination; and a control unit 34c for causing the selection unit 34b to select the first input unit 33 until the transfer unit 35a transfers, to the transfer destination, one or more second data not having been selected by the selection circuit 3 at the front stage if the first input unit 33 selected by the selection unit 34b is connected to the selection circuit 3 at the front stage.SELECTED DRAWING: Figure 10 |
