发明名称 ADAPTATION OF GAIN OF BASELINE WANDER SIGNAL
摘要 A receiver disposed in a serializer/deserializer (SerDes) system includes a coupling capacitor configured to receive a serial input signal from a transmitter operatively coupled with the receiver via a communication channel established therebetween and to output a capacitance output signal, an equalizer configured to receive a signal including the capacitance output signal having a baseline wander gain subtracted therefrom, a running disparity generator receiving decoded symbols and generating a running disparity signal, and a low-pass filter receiving the running disparity signal and outputting the BLW gain.
申请公布号 US2016080176(A1) 申请公布日期 2016.03.17
申请号 US201414484209 申请日期 2014.09.11
申请人 Avago Technologies General IP (Singapore) Pte. Ltd 发明人 Kotagiri Shiva Prasad;Malipatil Amaresh V.
分类号 H04L25/03 主分类号 H04L25/03
代理机构 代理人
主权项 1. A receiver disposed in a serializer/deserializer (Ser Des) system, the receiver comprising: a coupling capacitor configured to receive a serial input signal from a transmitter operatively coupled with the receiver via a communication channel established therebetween and to output a capacitance output signal; an equalizer configured to receive a signal comprising the capacitance output signal having a baseline wander gain subtracted therefrom, and to output an equalized signal; a running disparity generator receiving decoded symbols and generating a running disparity signal; and a low-pass filter receiving the running disparity signal and outputting the baseline wander gain, wherein the coupling capacitor is part of an on-chip alternating current coupling capacitance that causes a high-pass filter to be applied to the received serial input signal and wherein a cut-off frequency of the low-pass filter is equal to that of the high-pass filter at least due to the on-chip alternating current coupling capacitance.
地址 Singapore SG