发明名称 HIGH DENSITY SUBSTRATE ROUTING IN BBUL PACKAGE
摘要 Discussed generally herein are devices that include high density interconnects between dice and techniques for making and using those devices. In one or more embodiments a device can include a bumpless buildup layer (BBUL) substrate including a first die at least partially embedded in the BBUL substrate, the first die including a first plurality of high density interconnect pads. A second die can be at least partially embedded in the BBUL substrate, the second die including a second plurality of high density interconnect pads. A high density interconnect element can be embedded in the BBUL substrate, the high density interconnect element including a third plurality of high density interconnect pads electrically coupled to the first and second plurality of high density interconnect pads.
申请公布号 US2016079196(A1) 申请公布日期 2016.03.17
申请号 US201514922425 申请日期 2015.10.26
申请人 Intel Corporation 发明人 Teh Weng Hong;Chiu Chia-Pin
分类号 H01L23/00;H01L23/538;H01L23/31;H01L23/50;H01L25/18 主分类号 H01L23/00
代理机构 代理人
主权项 1. (canceled)
地址 Santa Clara CA US