发明名称 Microelectronic 3D packaging structure and method of manufacturing the same
摘要 A microelectronic 3D packaging structure and a method of manufacturing the same are introduced. The microelectronic 3D packaging structure includes a first board with a plurality of a first edges and disposed with a first electronic device; a second board with a plurality of a second edges and disposed with a second electronic device, wherein at least one second edge of the second board is jointed to at least one first edge of the first board to form a joint line; and a joint connection portion disposed at the joint line of the two adjacent boards and adapted to function as a connection path for transmitting signals.
申请公布号 US9288907(B2) 申请公布日期 2016.03.15
申请号 US201414217621 申请日期 2014.03.18
申请人 NATIONAL CHUNG SHAN INSTITUTE OF SCIENCE AND TECHNOLOGY 发明人 Hu Shao-Chung;Horng Kuo-Yang;Yang Ling-Yueh;Liu Wei-Ching;Chao Pen-Shan;Chen Kun-Feng;Hsu Louis Lu-Chen
分类号 H01L23/12;H05K1/14;H05K1/18;H05K1/11;H05K1/02;H05K3/32;H05K3/36 主分类号 H01L23/12
代理机构 Schmeiser, Olsen & Watts, LLP 代理人 Schmeiser, Olsen & Watts, LLP
主权项 1. A microelectronic 3D packaging structure, comprising: a first board with a plurality of first edges and disposed with at least one first electronic device; a second board with a plurality of second edges and disposed with at least one second electronic device, wherein at least one second edge of the second board is jointed to at least one first edge of the first board to form at least one joint line; a third board with a plurality of third edges and disposed with at least one third electronic device, wherein one of the third edges of the third board is jointed to at least one of the first edges and the other one of the third edges of the third board is jointed to at least one of the second edges; and a joint connection portion disposed at the joint line of two adjacent boards and provides at least one connection path for transmitting signals between the first board and the second board; wherein the first board, the second board and the third board further define therein a void space aligned substantially with a cavity disposed on a substrate which the microelectronic 3D packaging structure is mounted on.
地址 TW