发明名称 |
FinFET low resistivity contact formation method |
摘要 |
The invention relates to a contact structure of a semiconductor device. An exemplary structure for a contact structure for a semiconductor device comprises a substrate comprising a major surface and a trench below the major surface; a strained material filling the trench, wherein a lattice constant of the strained material is different from a lattice constant of the substrate, and wherein a surface of the strained material has received a passivation treatment; an inter-layer dielectric (ILD) layer having an opening over the strained material, wherein the opening comprises dielectric sidewalls and a strained material bottom; a dielectric layer coating the sidewalls and bottom of the opening, wherein the dielectric layer has a thickness ranging from 1 nm to 10 nm; a metal barrier coating an opening of the dielectric layer; and a metal layer filling a coated opening of the dielectric layer. |
申请公布号 |
US9287138(B2) |
申请公布日期 |
2016.03.15 |
申请号 |
US201414491848 |
申请日期 |
2014.09.19 |
申请人 |
Taiwan Semiconductor Manufacturing Company, Ltd. |
发明人 |
Wang Sung-Li;Shih Ding-Kang;Ko Chih-Hsin |
分类号 |
H01L31/072;H01L31/109;H01L21/3205;H01L29/78;H01L29/66;H01L23/485;H01L29/417;H01L21/768;H01L21/28;H01L21/02 |
主分类号 |
H01L31/072 |
代理机构 |
Slater & Matsil, L.L.P. |
代理人 |
Slater & Matsil, L.L.P. |
主权项 |
1. A method of forming a semiconductor device, the method comprising:
forming a fin on a substrate; epitaxially growing a strained material in source/drain regions of the fin; forming an inter-layer dielectric (ILD) layer over the substrate; forming an opening in the ILD layer to expose the strained material; passivating exposed portions of the strained material to form a treated surface; forming a conductive dielectric layer over the treated surface; forming a barrier metal layer over the conductive dielectric layer; and forming a metallic contact plug over the barrier layer in the opening in the ILD layer. |
地址 |
Hsin-Chu TW |