3D SEMICIRCULAR VERTICAL NAND STRING WITH SELF ALIGNED FLOATING GATE OR CHARGE TRAP CELL MEMORY CELLS AND METHODS OF FABRICATING AND OPERATING THE SAME

摘要

A three dimensional NAND device includes a common vertical channel and electrically isolated control gate electrodes on different lateral sides of the channel in each device level to form different lateral portions of a memory cell in each device level. Dielectric separator structures are located between and electrically isolate the control gate electrodes. The lateral portions of the memory cell in each device level may be electrically isolated by at least one of doping ungated portions of the channel adjacent to the separator structures or storing electrons in the separator structure.

主权项

1. A memory device, comprising:
a stack of alternating layers comprising insulating layers and control gate electrodes located over a substrate; a memory stack structure located within a memory opening extending through the stack and containing a semiconductor channel having a vertical portion that extends along a direction perpendicular to a top surface of the substrate; a dielectric separator structure which is located between and electrically isolates first control gate electrodes from second control gate electrodes in each device level; and at least one cell level isolation feature which electrically isolates lateral portions of a memory cell in each device level; wherein: the memory stack structure comprises at least two electrically isolated charge storage elements of the memory cell located around the semiconductor channel in each device level.