Semiconductor memory device capable of preventing negative bias temperature instability (NBTI) using self refresh information

摘要

A semiconductor memory device that includes a command decoder, a refresh controller, an oscillator and a delay unit. The command decoder generates a self refresh command, and the oscillator generates an oscillation signal. The refresh controller generates a refresh control signal and a recovery signal in response to the self refresh command and the oscillation signal. The delay unit transitions internal nodes included in the delay unit that are not transitioned during a refresh period in response to the refresh control signal and the recovery signal.

主权项

1. A semiconductor memory device, comprising:
a command decoder configured to generate a self refresh command; an oscillator configured to generate an oscillation signal; a refresh controller configured to generate a refresh control signal and a recovery signal in response to the self refresh command and the oscillation signal; and a delay unit configured to transition voltage levels of internal nodes included in the delay unit during a refresh period, in response to the refresh control signal and the recovery signal.