SEMICONDUCTOR DEVICE

摘要

To provide a memory cell for storing multilevel data that is less likely to be affected by variations in characteristics of transistors and that is capable of easily writing multilevel data in a short time and accurately reading it out. In writing, a current corresponding to multilevel data is supplied to the transistor in the memory cell and stored as the gate-drain voltage of the transistor in the memory cell. In reading, a current is supplied to the transistor in the transistor with the stored gate-drain voltage, and the multilevel data is obtained from the voltage supplied to generate a current that is equal to the current.

主权项

1. A semiconductor device comprising:
a memory cell; and first to fifth wirings, wherein the memory cell includes a first transistor, a second transistor, a third transistor, a first capacitor, the first wiring, the second wiring, the third wiring, the fourth wiring, and the fifth wiring, wherein one of a source and a drain of the first transistor is electrically connected to the first wiring, wherein the other of the source and the drain of the first transistor is electrically connected to one terminal of the first capacitor and one of a source and a drain of the second transistor, wherein a gate of the first transistor is electrically connected to the other terminal of the first capacitor and one of a source and a drain of the third transistor, wherein the other of the source and the drain of the second transistor is electrically connected to the fifth wiring, wherein a gate of the second transistor is electrically connected to the third wiring, wherein the other of the source and the drain of the third transistor is electrically connected to the second wiring, and a gate of the third transistor is electrically connected to the fourth wiring.